In recent years, unconventional nonvolatile memory (NVM) devices, such as ferroelectric random access memory (FRAM) devices, phase-change random access memory (PRAM) devices, and resistive random access memory (RRAM) devices, have emerged. In particular, RRAM devices, which exhibit a switching behavior between a high resistance state and a low resistance state, have various advantages over conventional NVM devices. Such advantages include, for example, compatible fabrication steps with current complementary-metal-oxide-semiconductor (CMOS) technologies, low-cost fabrication, a compact structure, flexible scalability, fast switching, high integration density, etc.
Generally, an RRAM device, or more particularly an RRAM bit cell, includes a top electrode (e.g., an anode) and a bottom electrode (e.g., a cathode) with a variable resistance dielectric layer interposed therebetween. When writing the RRAM bit cell, a ‘set’ voltage is applied across the top and bottom electrodes to change the variable resistance dielectric layer from a first resistivity (e.g., a high resistance state (HRS)) to a second resistivity (e.g., a low resistance state (LRS)). And, a ‘reset’ voltage (e.g., smaller than the set voltage in an absolute value) is applied across the top and bottom electrodes to change the variable resistance dielectric layer from the second resistivity back to the first resistivity, for example, from LRS to HRS. Therefore, the LRS and HRS may correspond to a logic “1” and a logic “0” (or vice versa), respectively, of the RRAM bit cell.
When performing such a write operation to a RRAM bit cell of a conventional RRAM device, however, a cell current flowing through the RRAM bit cell is not monitored, which disadvantageously affects endurance of the RRAM bit cell (i.e., a lifetime of the RRAM bit cell). In particular, since a resistivity of the RRAM bit cell varies during a write operation, without monitoring the cell current, the RRAM bit cell may be overly written, which in turn shortens the endurance of the RRAM bit cell. Further, an increasing number of such overly written RRAM bit cells, typically known as “tailing bits,” deteriorates a yield of the conventional RRAM device. Thus, conventional RRAM devices are not entirely satisfactory.